Privilege escalation in Chipsalliance Rocketchip
CVE-2025-63384
A vulnerability was discovered in RISC-V Rocket-Chip v1.6 and before implementation where the SRET (Supervisor-mode Exception Return) instruction fails to correctly transition the processor's privilege level. Instead of downgrading from Machine-mode (M-mode) to Supervisor-mode (S-mode) as specified by the sstatus.SPP bit, the processor incorrectly remains in M-mode, leading to a critical privilege retention vulnerability.
Published · last modified .
CVSS v3 metric
CVSS v3 base score 6.5 (Medium). Vector: CVSS:3.1/AV:N/AC:L/PR:L/UI:N/S:U/C:H/I:N/A:N.
EPSS exploit prediction
EPSS: 0.003 (21.0th percentile), scored .
Very low probability of exploitation in the next 30 days; routine patching cadence is appropriate. 21st percentile — 21.0% of CVEs in the catalogue have a lower EPSS than this one. How to read EPSS.
EPSS over last 30 days · oldest: 0.003 · newest: 0.003 · change: 0.000
Affected products
Weakness classification (CWE)
References
- github.com/chipsalliance/rocket-chip.git (Product)
- github.com/107040503/RISC-V-Vulnerability-Disclosure_SRET (Exploit, Third Party Advisory)
Frequently asked questions
- What is CVE-2025-63384?
- CVE-2025-63384 is a medium-severity vulnerability in Chipsalliance Rocketchip, classified under Incorrect Privilege Assignment. CVSS score: 6.5/10. Published 2025-11-10.
- How severe is CVE-2025-63384?
- Medium severity. CVSS v3 base score is 6.5 out of 10.