Integer overflow in Microchip Mplab® Harmony 3 Core Module
CVE-2024-30212
If a SCSI READ(10) command is initiated via USB using the largest LBA (0xFFFFFFFF) with it's default block size of 512 and a count of 1, the first 512 byte of the 0x80000000 memory area is returned to the user. If the block count is increased, the full RAM can be exposed. The same method works to write to this memory area. If RAM contains pointers, those can be - depending on the application - overwritten to return data from any other offset including Progam and Boot Flash.
Vulnerability class: Integer Overflow
Published · last modified .
EPSS exploit prediction
EPSS: 0.006 (44.8th percentile), scored .
Very low probability of exploitation in the next 30 days; routine patching cadence is appropriate. 45th percentile — 44.8% of CVEs in the catalogue have a lower EPSS than this one. How to read EPSS.
EPSS over last 30 days · oldest: 0.006 · newest: 0.006 · change: 0.000
Affected products
- Microchip Mplab® Harmony 3 Core Module — versions 3.0.0
Weakness classification (CWE)
Public proof-of-concept exploits
References
- dc3f6da9-85b5-4a73-84a2-2ec90b40fca5 (patch, mitigation)
- dc3f6da9-85b5-4a73-84a2-2ec90b40fca5 (release-notes)
- dc3f6da9-85b5-4a73-84a2-2ec90b40fca5
Frequently asked questions
- What is CVE-2024-30212?
- CVE-2024-30212 is a vulnerability in Microchip Mplab® Harmony 3 Core Module, classified under Integer Overflow or Wraparound. Published 2024-05-28.
- Is CVE-2024-30212 known to be exploited?
- 2 public proof-of-concept repositories are indexed. Not currently listed in the CISA KEV catalog.